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» Robustness of Sequential Circuits
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DATE
2006
IEEE
91views Hardware» more  DATE 2006»
14 years 7 days ago
Efficient incremental clock latency scheduling for large circuits
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
Christoph Albrecht
ATS
1997
IEEE
87views Hardware» more  ATS 1997»
14 years 24 days ago
A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits
Testing circuits which do not include a global reset signal requires either complex ATPG algorithms based on 9- or even 256-valued algebras, or some suitable method to generate in...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
ICCD
1997
IEEE
78views Hardware» more  ICCD 1997»
14 years 24 days ago
A new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits
This paper presents a new approach to the automated generation of an initialization sequence for synchronous sequential circuits. Finding an initialization sequence is a hard task...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
GLVLSI
2010
IEEE
178views VLSI» more  GLVLSI 2010»
14 years 1 months ago
Improving the testability and reliability of sequential circuits with invariant logic
In this paper, we investigate dual applications for logic implications, which can provide both online error detection capabilities and improve the testing efficiency of an integr...
Nuno Alves, Kundan Nepal, Jennifer Dworak, R. Iris...
DATE
2003
IEEE
66views Hardware» more  DATE 2003»
14 years 1 months ago
Using RTL Statespace Information and State Encoding for Induction Based Property Checking
This paper focuses on checking safety properties for sequential circuits specified on the RT-level. We study how different state encodings can be used to create a gate-level repr...
Markus Wedler, Dominik Stoffel, Wolfgang Kunz