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» Robustness of Sequential Circuits

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DAC
2004
ACM

128views Computer Architecture» more DAC 2004»

Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining

14 years 10 months ago

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With deep-sub-micron (DSM) technology, statistical timing analysis becomes increasingly crucial to characterize signal transmission over global interconnect wires. In this paper, ...

Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen

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ICCAD
2007
IEEE

86views Hardware» more ICCAD 2007»

Minimizing leakage power in sequential circuits by using mixed Vt flip-flops

14 years 5 months ago

Download www.asp-dac.itri.org.tw

Jaehyun Kim, Youngsoo Shin

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ICCAD
2006
IEEE

183views Hardware» more ICCAD 2006»

Soft error derating computation in sequential circuits

14 years 5 months ago

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Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...

Hossein Asadi, Mehdi Baradaran Tahoori

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ICCAD
2004
IEEE

87views Hardware» more ICCAD 2004»

A vectorless estimation of maximum instantaneous current for sequential circuits

14 years 5 months ago

Download cad63.cs.nthu.edu.tw

Cheng-Tao Hsieh, Jian-Cheng Lin, Shih-Chieh Chang

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