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» Robustness of Sequential Circuits
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ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
14 years 3 months ago
Robust differential asynchronous nanoelectronic circuits
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
Bao Liu
VLSID
1995
IEEE
97views VLSI» more  VLSID 1995»
14 years 13 days ago
Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability
In this paper, we present methods for synthesizing multi-level asynchronous circuits to be both hazard-free
Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng
DAC
2006
ACM
14 years 2 months ago
Mining global constraints for improving bounded sequential equivalence checking
In this paper, we propose a novel technique on mining relationships in a sequential circuit to discover global constraints. In contrast to the traditional learning methods, our mi...
Weixin Wu, Michael S. Hsiao
ICCD
2005
IEEE
135views Hardware» more  ICCD 2005»
14 years 5 months ago
Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults
In this paper, we make two major contributions: First, to enhance Boolean learning, we propose a new class of logic implications called extended forward implications. Using a nove...
Manan Syal, Rajat Arora, Michael S. Hsiao
ICCAD
2007
IEEE
106views Hardware» more  ICCAD 2007»
14 years 5 months ago
A general model for performance optimization of sequential systems
Abstract— Retiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, differe...
Dmitry Bufistov, Jordi Cortadella, Michael Kishine...