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» Robustness of Sequential Circuits
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ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
14 years 5 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...
ISCAS
2002
IEEE
94views Hardware» more  ISCAS 2002»
14 years 1 months ago
A robust self-resetting CMOS 32-bit parallel adder
This paper presents new circuit configurationsfor a more robust and efficient form of self-resettingCMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are...
Gunok Jung, V. A. Sundarajan, Gerald E. Sobelman
DATE
2009
IEEE
141views Hardware» more  DATE 2009»
14 years 22 days ago
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA
Side channel attacks are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of triple rail logic agains...
Victor Lomné, Philippe Maurine, Lionel Torr...
ISVLSI
2006
IEEE
77views VLSI» more  ISVLSI 2006»
14 years 2 months ago
A Robust Synchronizer
We describe a new latch circuit designed to give a high performance in low voltage synchronizer applications. By increasing the latch current only during metastability, we can mor...
Jun Zhou, David Kinniment, Gordon Russell, Alexand...
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
14 years 3 months ago
Sizing Rules for Bipolar Analog Circuit Design
This paper presents sizing rules for basic building blocks in analog bipolar circuit design. Sizing rules efficiently capture design knowledge on the technology-specific level o...
Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann