768 search results - page 83 / 154 » Robustness of Sequential Circuits |
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
In this paper we address the problem of designing very high throughput finite state machines (FSMs). The presence of loops in sequential circuits prevents a straightforward and g...
EVOW
1999
Springer
14 years 1 months ago
1999
Springer
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
VTS
1999
IEEE
14 years 1 months ago
1999
IEEE
Sequential test generators fail to yield tests for some stuck-at-faults because they are unable to reach certain states necessary for exciting propagating these target faults. Add...
ICCAD
1998
IEEE
14 years 1 months ago
1998
IEEE
We present a fast, dynamic fault coverage estimation technique for sequential circuits that achieves high degrees of accuracy by signi cantly reducing the number of injected fault...
VTS
1998
IEEE
14 years 1 months ago
1998
IEEE
This paper proposes an ATPG technique that reduces power dissipation during the test of sequential circuits. The proposed approach exploits some redundancy introduced during the t...