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» Run-Time Power Consumption Modeling for Embedded Multimedia ...
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CODES
2005
IEEE
14 years 1 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
TCAD
2002
158views more  TCAD 2002»
13 years 7 months ago
Static power modeling of 32-bit microprocessors
The paper presents a novel strategy aimed at modelling instruction energy consumption of 32-bits microprocessors. Differently from former approaches, the proposed instruction-level...
Carlo Brandolese, Fabio Salice, William Fornaciari...
VLSID
2004
IEEE
138views VLSI» more  VLSID 2004»
14 years 8 months ago
Synthesis-driven Exploration of Pipelined Embedded Processors
Recent advances on language based software toolkit generation enables performance driven exploration of embedded systems by exploiting the application behavior. There is a need fo...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
DAC
1997
ACM
14 years 1 days ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
14 years 5 days ago
Power minimization using system-level partitioning of applications with quality of service requirements
Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless commun...
Gang Qu, Miodrag Potkonjak