55 search results - page 4 / 11 » Run-time compaction of FPGA designs |
DAC
1998
ACM
14 years 8 months ago
1998
ACM
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Weaknesses have recently been found in the widely used cryptographic hash functions SHA-1 and MD5. A potential alternative for these algorithms is the Whirlpool hash function, whi...
FPGA
2004
ACM
14 years 24 days ago
2004
ACM
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
APCSAC
2001
IEEE
13 years 11 months ago
2001
IEEE
Traditional reconfigurable computing platforms are designed to be single user and have been acknowledged to be difficult to design applications for. The design tools are still pri...
FPGA
2003
ACM
14 years 19 days ago
2003
ACM
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...