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» SOI Digital CMOS VLSI - a Design Perspective
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DATE
1999
IEEE
129views Hardware» more  DATE 1999»
13 years 11 months ago
Battery-Powered Digital CMOS Design
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
Massoud Pedram, Qing Wu
ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
13 years 11 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
GLVLSI
1999
IEEE
90views VLSI» more  GLVLSI 1999»
13 years 11 months ago
A Memory Design in QCAs using the SQUARES Formalism
We present a formalism for implementing circuits with Quantum-dot Cellular Automata (QCA), comprising a set of standard circuit elements with uniform layout rules. The formalism s...
Daniel Berzon, Terry J. Fountain
DATE
1999
IEEE
81views Hardware» more  DATE 1999»
13 years 11 months ago
A Power Estimation Model for High-Speed CMOS A/D Converters
Power estimation is important for system-level exploration and trade-off analysis of VLSI systems. A power estimator for high-speed analog to digital converters that exploits info...
Erik Lauwers, Georges G. E. Gielen
ICCD
1993
IEEE
90views Hardware» more  ICCD 1993»
13 years 11 months ago
Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip
In this paper the design of a high-speed cryptographic coprocessor is presented. This coprocessor is named Subterranean and can be used for both cryptographic pseudorandom sequenc...
Luc J. M. Claesen, Joan Daemen, Mark Genoe, G. Pee...