97 search results - page 4 / 20 » SRAM Cell Current in Low Leakage Design |
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
SRAM leakage constitutes a significant portion of the standby power budget of modern SoC products for handheld applications such as PDA and cellular phones. NMOS and PMOS reverse ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
Reducing leakage power and improving the reliability of data stored in the memory cells are both becoming challenging as technology scales down. While the smaller threshold voltag...
ISQED
2008
IEEE
14 years 2 months ago
2008
IEEE
SRAM leakage power dominates the total power of low duty-cycle applications, e.g., sensor nodes. Accordingly, leakage power reduction during data-retention in SRAM standby is ofte...
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...