Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Resource management constitutes an important infrastructural component of a computational grid environment. The aim of grid resource management is to efficiently schedule applicat...
Junwei Cao, Stephen A. Jarvis, Daniel P. Spooner, ...
Performance projections of High Performance Computing (HPC) applications onto various hardware platforms are important for hardware vendors and HPC users. The projections aid hard...
Sameh Sharkawi, Don DeSota, Raj Panda, Rajeev Indu...
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...