174 search results - page 5 / 35 » Schedule-aware performance estimation of communication archi... |
ICCAD
1999
IEEE
14 years 7 days ago
1999
IEEE
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
ISCA
1994
IEEE
14 years 2 days ago
1994
IEEE
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
In the Artemis project [13], design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mappin...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, a novel design space exploration approach is proposed that enables a concurrent optimization of the topology, the process binding, and the communication routing of ...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...