125 search results - page 9 / 25 » Scheduling to minimize power consumption using submodular fu... |
ISSS
1995
IEEE
14 years 3 days ago
1995
IEEE
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
ISLPED
2006
ACM
14 years 2 months ago
2006
ACM
This paper addresses the problem of low-power fanout optimization. We show that due to neglecting short-circuit current, previous analytical techniques proposed to optimize the ar...
JPDC
2008
13 years 8 months ago
2008
Energy saving is becoming one of the major design issues in processor architectures with multiple functional units (FUs). Nested loops are usually the most critical part in multim...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
CSREAESA
2003
13 years 10 months ago
2003
In this paper we address the problem of minimization of power consumption in combinational circuits by minimizing the number of switching transitions at the output nodes of each g...