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ICCD
2007
IEEE
205views Hardware» more  ICCD 2007»
14 years 7 months ago
Hardware libraries: An architecture for economic acceleration in soft multi-core environments
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
David Meisner, Sherief Reda
FPGA
2007
ACM
119views FPGA» more  FPGA 2007»
14 years 4 months ago
Synthesis of an application-specific soft multiprocessor system
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
Jason Cong, Guoling Han, Wei Jiang
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 3 months ago
Soft-Error Tolerance Analysis and Optimization of Nanometer Circuits
Nanometer circuits are becoming increasingly susceptible to soft-errors due to alpha-particle and atmospheric neutron strikes as device scaling reduces node capacitances and suppl...
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhij...
DAC
1994
ACM
14 years 2 months ago
Software Scheduling in the Co-Synthesis of Reactive Real-Time Systems
Existing software scheduling techniques limit the functions that can be implemented in software to those with a restricted class of timing constraints, in particular those with a c...
Pai H. Chou, Gaetano Borriello
WLP
2005
Springer
14 years 3 months ago
Impact- and Cost-Oriented Propagator Scheduling for Faster Constraint Propagation
Constraint Propagation can be speeded up significantly by choosing a good execution order for propagators. A propagator is an implicit representation of a constraint which is wide...
Georg Ringwelski, Matthias Hoche