325 search results - page 35 / 65 » Secure Configuration of Field Programmable Gate Arrays |
ISVLSI
2003
IEEE
14 years 25 days ago
2003
IEEE
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
This paper presents a single chip implementation of a space-time algorithm for co-channel interference (CCI) and intersymbol interference (ISI) reduction in GSM/DCS systems. The t...
DAC
2003
ACM
14 years 24 days ago
2003
ACM
This paper presents an analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on field programmable gate arrays. This ana...
FPL
2009
Springer
14 years 5 days ago
2009
Springer
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Partial Reconfiguration on heterogeneous Field Programmable Gate Arrays (FPGA) with millions of gates yields better utilization of resources by swapping in and out the active modu...