An efficient deterministic BIST scheme based on partial scan chains together with a scan selection algorithm tailored for BIST is presented. The algorithm determines a minimum num...
This paper presents a game semantics for a simply-typed λ-calculus with qbits constants and associated quantum operations. The resulting language is expressive enough to encode a...
SAT-based automatic test pattern generation has several advantages compared to conventional structural procedures, yet often yields too large test sets. We present a dynamic compa...
Alejandro Czutro, Ilia Polian, Piet Engelke, Sudha...
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
— We present a probabilistic fault model that allows any number of gates in an integrated circuit to fail probabilistically. Tests for this fault model, determined using the theo...
Zhanglei Wang, Krishnendu Chakrabarty, Michael G&o...