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» Sequential circuits for program analysis
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PLDI
2004
ACM
14 years 1 months ago
KISS: keep it simple and sequential
The design of concurrent programs is error-prone due to the interaction between concurrently executing threads. Traditional automated techniques for finding errors in concurrent ...
Shaz Qadeer, Dinghao Wu
AC
2002
Springer
13 years 7 months ago
A Programming Approach to the Design of Asynchronous Logic Blocks
Abstract. Delay-Insensitive Sequential Processes is a structured, parallel programming language. It facilitates the clear, succinct and precise specification of the way an asynchro...
Mark B. Josephs, Dennis P. Furey
ICCAD
1995
IEEE
136views Hardware» more  ICCAD 1995»
13 years 11 months ago
A controller-based design-for-testability technique for controller-data path circuits
This paper investigates the effect of the controller on the testability of sequential circuits composed of controllers and data paths. It is shown that even when both the controll...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
ISQED
2010
IEEE
128views Hardware» more  ISQED 2010»
14 years 23 days ago
Soft error rate determination for nanoscale sequential logic
We analyze the neutron induced soft error rate (SER) by modeling induced error pulse using two parameters, occurrence frequency and probability density function for the pulse widt...
Fan Wang, Vishwani D. Agrawal
ICCAD
2004
IEEE
180views Hardware» more  ICCAD 2004»
14 years 4 months ago
Physical placement driven by sequential timing analysis
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
Aaron P. Hurst, Philip Chong, Andreas Kuehlmann