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» Signature Rollback - A Technique for Testing Robust Circuits
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HOST
2008
IEEE
14 years 2 months ago
IC Activation and User Authentication for Security-Sensitive Systems
—A number of applications depend on the protection of security-sensitive hardware, preventing unauthorized users from gaining access to the functionality of the integrated circui...
Jiawei Huang, John Lach
DAC
2004
ACM
14 years 8 months ago
A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
Chong Zhao, Xiaoliang Bai, Sujit Dey
ITC
2003
IEEE
120views Hardware» more  ITC 2003»
14 years 1 months ago
High Quality ATPG for Delay Defects
: The paper presents a novel technique for generating effective vectors for delay defects. The test set achieves high path delay fault coverage to capture smalldistributed delay de...
Puneet Gupta, Michael S. Hsiao
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
14 years 4 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...
ATS
2003
IEEE
151views Hardware» more  ATS 2003»
14 years 1 months ago
BDD Based Synthesis of Symmetric Functions with Full Path-Delay Fault Testability
A new technique for synthesizing totally symmetric Boolean functions is presented that achieves complete robust path delay fault testability. We apply BDDs for the synthesis of sy...
Junhao Shi, Görschwin Fey, Rolf Drechsler