29 search results - page 5 / 6 » Signature-based Microprocessor Power Modeling for Rapid Syst... |
ISLPED
2005
ACM
14 years 19 days ago
2005
ACM
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
ISLPED
2006
ACM
14 years 1 months ago
2006
ACM
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...