137 search results - page 15 / 28 » Simulation methods for RF integrated circuits |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
DATE
2003
IEEE
14 years 9 days ago
2003
IEEE
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
ISQED
2007
IEEE
14 years 1 months ago
2007
IEEE
Due to the roaring power dissipation and gaining popularity of 3D integration, thermal dissipation has been a critical concern of modern VLSI design. The availability for chip-lev...
GLVLSI
2005
IEEE
14 years 19 days ago
2005
IEEE
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
DAC
2003
ACM
14 years 8 days ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...