137 search results - page 15 / 28 » Simulation methods for RF integrated circuits |
131
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DAC
2002
ACM
16 years 3 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
121
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DATE
2003
IEEE
15 years 8 months ago
2003
IEEE
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
141
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ISQED
2007
IEEE
15 years 9 months ago
2007
IEEE
Due to the roaring power dissipation and gaining popularity of 3D integration, thermal dissipation has been a critical concern of modern VLSI design. The availability for chip-lev...
124
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GLVLSI
2005
IEEE
15 years 8 months ago
2005
IEEE
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
128
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DAC
2003
ACM
15 years 8 months ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...