The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, ...
Skin effect makes interconnect resistance and inductance frequency dependent. This paper addresses the problem of efficiently estimating the signal characteristics of any RLC netw...
For present-day micro-electronic designs, it is becoming ever more important to accurately model substrate coupling effects. Basically, either a Finite Element Method (FEM) or a B...