1304 search results - page 157 / 261 » Simulation of Soliton Circuits |
TC
1998
13 years 9 months ago
1998
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
DAC
1998
ACM
14 years 11 months ago
1998
ACM
In this paper we present a statistical method for estimating the maximum power consumption in VLSI circuits. The method is based on the theory of extreme order statistics applied ...
ICCAD
2005
IEEE
14 years 7 months ago
2005
IEEE
— Standard small-signal analysis methods for circuits break down for oscillators because small input perturbations result in arbitrarily large output changes, thus invalidating f...
FCCM
2009
IEEE
14 years 4 months ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...