A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
A fast asynchronous shift register is used as the serializer and de-serializer in a novel bit-serial on-chip communication link. The link employs two-phase transition-based LEDR e...
Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Ko...
- In this article, a set membership (SM) identification technique is tailored to detect faults in microelectromechanical systems. The SM-identifier estimates an orthotope which con...
— This paper presents some circuitry for use within a visual-processing depth-recovery algorithm based upon spike timing. The accuracy of the depth calculation relies on a predic...
- The heap charge pump represents an attractive voltage multiplier scheme in integrated circuits where only low-voltage devices are available. This paper presents a performance opt...
R. Arona, Edoardo Bonizzoni, Franco Maloberti, Gui...