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» Simulation of Soliton Circuits
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TVLSI
2002
130views more  TVLSI 2002»
13 years 8 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
VLSID
2010
IEEE
190views VLSI» more  VLSID 2010»
13 years 7 months ago
Rethinking Threshold Voltage Assignment in 3D Multicore Designs
Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature...
Koushik Chakraborty, Sanghamitra Roy
TVLSI
2010
13 years 3 months ago
Discrete Buffer and Wire Sizing for Link-Based Non-Tree Clock Networks
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
Rupak Samanta, Jiang Hu, Peng Li

Publication
303views
12 years 7 months ago
Evolutionary synthesis of analog networks
he significant increase in the available computational power that took place in recent decades has been accompanied by a growing interest in the application of the evolutionary ap...
Claudio Mattiussi
DAC
2003
ACM
14 years 10 months ago
Efficient model order reduction including skin effect
Skin effect makes interconnect resistance and inductance frequency dependent. This paper addresses the problem of efficiently estimating the signal characteristics of any RLC netw...
Shizhong Mei, Chirayu S. Amin, Yehea I. Ismail