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» Simultaneous Circuit Transformation and Routing
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ICCAD
2003
IEEE
154views Hardware» more  ICCAD 2003»
14 years 4 months ago
Length-Matching Routing for High-Speed Printed Circuit Boards
As the clock frequencies used in industrial applications increase, the timing requirements imposed on routing problems become tighter. So, it becomes important to route the nets w...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2006
IEEE
105views Hardware» more  ICCAD 2006»
14 years 4 months ago
An optimal simultaneous diode/jumper insertion algorithm for antenna fixing
As technology enters the nanometer territory, the antenna effect plays an important role in determining the yield and reliability of a VLSI circuit. Diode insertion and jumper in...
Zhe-Wei Jiang, Yao-Wen Chang
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
13 years 11 months ago
LOT: logic optimization with testability-new transformations using recursive learning
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
TCAD
1998
82views more  TCAD 1998»
13 years 7 months ago
LOT: Logic Optimization with Testability. New transformations for logic synthesis
—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
ASPDAC
2004
ACM
85views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Integrating buffer planning with floorplanning for simultaneous multi-objective optimization
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance and signal integrity. Buffer insertion is one...
Yi-Hui Cheng, Yao-Wen Chang