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ICCAD
2005
IEEE
14 years 6 months ago
2005
IEEE
— Yield improvement through exploiting fault-free sections of defective chips is a well-known technique [1][2]. The idea is to partition the circuitry of a chip in a way that fau...
ICCD
2005
IEEE
14 years 3 months ago
2005
IEEE
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
ICPP
2002
IEEE
14 years 2 months ago
2002
IEEE
In this paper, we investigate an efficient off-line scheduling algorithm in which real-time tasks with precedence constraints are executed in a heterogeneous environment. It provi...
EDCC
2006
Springer
14 years 1 months ago
2006
Springer
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
PPOPP
2005
ACM
14 years 3 months ago
2005
ACM
As the number of processors in today’s high performance computers continues to grow, the mean-time-to-failure of these computers are becoming significantly shorter than the exe...