66 search results - page 2 / 14 » SoC Synthesis with Automatic Hardware Software Interface Gen... |
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
ICCAD
2008
IEEE
14 years 5 months ago
2008
IEEE
—The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in the unit-level. Especially for the external interrupts, since they interface with othe...
DATE
2004
IEEE
14 years 9 days ago
2004
IEEE
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
FDL
2005
IEEE
14 years 2 months ago
2005
IEEE
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...