2805 search results - page 503 / 561 » Software, architecture, and participatory design |
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
CODES
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
ACMICEC
2004
ACM
14 years 1 months ago
2004
ACM
This paper presents a loosely coupled service-composition paradigm. This paradigm employs a distributed data flow that differs markedly from centralized information flow adopted b...
ISCA
1996
IEEE
14 years 7 days ago
1996
IEEE
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
CASES
2007
ACM
14 years 2 days ago
2007
ACM
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to i...