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ICSE
2003
IEEE-ACM
14 years 8 months ago
Quantifying the Value of Architecture Design Decisions: Lessons from the Field
This paper outlines experiences with using economic criteria to make architecture design decisions. It briefly describes the CBAM (Cost Benefit Analysis Method) framework applied ...
Mike Moore, Rick Kazman, Mark Klein, Jai Asundi
CODES
2004
IEEE
14 years 15 days ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
ISPASS
2007
IEEE
14 years 3 months ago
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures
Semiconductor transient faults (i.e. soft errors) have become an increasingly important threat to microprocessor reliability. Simultaneous multithreaded (SMT) architectures exploi...
Wangyuan Zhang, Xin Fu, Tao Li, José A. B. ...
ISPASS
2006
IEEE
14 years 2 months ago
Critical path analysis of the TRIPS architecture
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
Ramadass Nagarajan, Xia Chen, Robert G. McDonald, ...
EWSA
2005
Springer
14 years 2 months ago
On the Systematic Conformance Check of Software Artefacts
Abstract. In this paper we present a systematic check of the conformance of the implemented and the intended software architecture. Nowadays industry is confronted with rapidly evo...
Hylke W. van Dijk, Bas Graaf, Rob Boerman