214 search results - page 5 / 43 » Speeding up power estimation of embedded software |
ANCS
2008
ACM
13 years 9 months ago
2008
ACM
Today's routers need to perform packet classification at wire speed in order to provide critical services such as traffic billing, priority routing and blocking unwanted Inte...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
A five-fold increase in leakage current is predicted with each technology generation. While Dynamic Voltage Scaling (DVS) is known to reduce dynamic power consumption, it also cau...
ISLPED
1996
ACM
13 years 11 months ago
1996
ACM
Transistlw-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In thisp...
JSW
2007
13 years 7 months ago
2007
— The paper addresses software and firmware implementation of multiple-output Boolean functions based on cascades of Look-Up Tables (LUTs). A LUT cascade is described as a means ...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper evaluates the use of pin and cycle accurate SystemC models for embedded system design exploration and early software development. The target system is MicroBlaze Vanill...