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» Static timing analysis for modeling QoS in networks-on-chip
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RTCSA
2003
IEEE
14 years 27 days ago
XRTJ: An Extensible Distributed High-Integrity Real-Time Java Environment
Despite Java’s initial promise of providing a reliable and cost-effective platform-independent environment, the language appears to be unfavourable in the area of high-integrity...
Erik Yu-Shing Hu, Andy J. Wellings, Guillem Bernat
DAC
2006
ACM
14 years 8 months ago
Statistical timing analysis with correlated non-gaussian parameters using independent component analysis
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
Jaskirat Singh, Sachin S. Sapatnekar
DATE
2006
IEEE
129views Hardware» more  DATE 2006»
14 years 1 months ago
Non-gaussian statistical interconnect timing analysis
This paper focuses on statistical interconnect timing analysis in a parameterized block-based statistical static timing analysis tool. In particular, a new framework for performin...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
DAC
2004
ACM
14 years 8 months ago
STAC: statistical timing analysis with correlation
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
Jiayong Le, Xin Li, Lawrence T. Pileggi
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
14 years 1 days ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...