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» Static timing analysis using backward signal propagation
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DATE
2006
IEEE
158views Hardware» more  DATE 2006»
14 years 1 months ago
Modeling multiple input switching of CMOS gates in DSM technology using HDMR
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
Jayashree Sridharan, Tom Chen
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
14 years 2 months ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening
MOBIHOC
2006
ACM
14 years 6 months ago
Topology control meets SINR: : the scheduling complexity of arbitrary topologies
To date, topology control in wireless ad hoc and sensor networks--the study of how to compute from the given communication network a subgraph with certain beneficial properties--h...
Thomas Moscibroda, Roger Wattenhofer, Aaron Zollin...
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
13 years 11 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
TSP
2008
151views more  TSP 2008»
13 years 7 months ago
Convergence Analysis of Reweighted Sum-Product Algorithms
Markov random fields are designed to represent structured dependencies among large collections of random variables, and are well-suited to capture the structure of real-world sign...
Tanya Roosta, Martin J. Wainwright, Shankar S. Sas...