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GLVLSI
2010
IEEE
190views VLSI» more  GLVLSI 2010»
13 years 9 months ago
A linear statistical analysis for full-chip leakage power with spatial correlation
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorith...
Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
IJFCS
2008
102views more  IJFCS 2008»
13 years 7 months ago
Gene Assembly Models and Boolean Circuits
We propose two different ways to simulate Boolean circuits in the framework of ciliate computations, based on the intramolecular and on the intermolecular gene assembly models wit...
Tseren-Onolt Ishdorj, Ion Petre
ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
14 years 4 months ago
A Trajectory Piecewise-Linear Approach to Model Order Reduction and Fast Simulation of Nonlinear Circuits and Micromachined Devi
—In this paper, we present an approach to nonlinear model reduction based on representing a nonlinear system with a piecewise-linear system and then reducing each of the pieces w...
Michal Rewienski, Jacob White
ICCAD
2003
IEEE
204views Hardware» more  ICCAD 2003»
14 years 4 months ago
Modeling of Ballistic Carbon Nanotube Field Effect Transistors for Efficient Circuit Simulation
Carbon Nanotube Field-Effect Transistors (CNFETs) are being extensively studied as possible successors to CMOS. Novel device structures have been fabricated and device simulators ...
Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik ...
ISQED
2006
IEEE
106views Hardware» more  ISQED 2006»
14 years 1 months ago
Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration
We propose an accurate architecture-level power estimation method for SRAM memories. This hybrid method is composed of an analytical part for dynamic power estimation and a circui...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...