1459 search results - page 19 / 292 » Statistical Modeling for Circuit Simulation |
DATE
2000
IEEE
14 years 14 hour ago
2000
IEEE
This paper is about gate sizing under a statistical delay model. It shows we can solve the gate sizing problem exactly for a given statistical delay model. The formulation used al...
INTERSPEECH
2010
13 years 2 months ago
2010
Statistical user simulation is an efficient and effective way to train and evaluate the performance of a (spoken) dialog system. In this paper, we design and evaluate a modular da...
ICPADS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract-Predicting sequential execution blocks of a large scale parallel application is an essential part of accurate prediction of the overall performance of the application. Whe...
TCAD
1998
13 years 7 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
We consider the problem of testing for delay faults in macrobased circuits. Macro-based circuits are obtained as a result of technology mapping. Gate-level fault models cannot be ...