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DATE
2003
IEEE
120views Hardware» more  DATE 2003»
14 years 25 days ago
Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step
Abstract — This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between the delay defect d...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-...
DATE
2004
IEEE
157views Hardware» more  DATE 2004»
13 years 11 months ago
Hierarchical Modeling and Simulation of Large Analog Circuits
This paper proposes a new hierarchical circuit modeling and simulation technique in s-domain for linear analog circuits. The new algorithm can perform circuit complexity reduction...
Sheldon X.-D. Tan, Zhenyu Qi, Hang Li
CORR
2007
Springer
106views Education» more  CORR 2007»
13 years 7 months ago
Nano-Sim: A Step Wise Equivalent Conductance based Statistical Simulator for Nanotechnology Circuit Design
: New nanotechnology based devices are replacing CMOS devices to overcome CMOS technology’s scaling limitations. However, many such devices exhibit nonmonotonic I-V characteristi...
Bharat Sukhwani, Uday Padmanabhan, Janet Meiling W...
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
13 years 11 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer