246 search results - page 4 / 50 » Statistical gate sizing for timing yield optimization |
PATMOS
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. The continuous miniaturization of semiconductor devices imposes serious threats to design robustness against process variations and environmental fluctuations. Modern ci...
ISQED
2007
IEEE
14 years 1 months ago
2007
IEEE
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
This paper is about gate sizing under a statistical delay model. It shows we can solve the gate sizing problem exactly for a given statistical delay model. The formulation used al...
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...