This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....
Simulation languages and the GUIs supporting them may be excellent tools for creating simulation codes, but are not necessarily the best tools to use for creating descriptions of ...
Edward Huang, Randeep Ramamurthy, Leon F. McGinnis
Growth in the complexity of computing systems, in the dynamism of the environments they operate in, and the need for timely adaptations as conditions change, now pose significant...
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
PPP is a Web-based simulation and synthesis environment for low-power design. In this paper we describe the gate-level simulation engine of PPP, that achieves accuracy always with...
Alessandro Bogliolo, Luca Benini, Bruno Ricc&ograv...