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VIS
2007
IEEE
149views Visualization» more  VIS 2007»
14 years 11 months ago
Time Dependent Processing in a Parallel Pipeline Architecture
Pipeline architectures provide a versatile and efficient mechanism for constructing visualizations, and they have been implemented in numerous libraries and applications over the p...
John Biddiscombe, Berk Geveci, Ken Martin, Kenn...
TPDS
2008
188views more  TPDS 2008»
13 years 10 months ago
Interference-Aware Joint Routing and TDMA Link Scheduling for Static Wireless Networks
We study efficient interference-aware joint routing and TDMA link scheduling for a multihop wireless network to maximize its throughput. Efficient link scheduling can greatly reduc...
Yu Wang 0003, Weizhao Wang, Xiang-Yang Li, Wen-Zha...
FPGA
1999
ACM
139views FPGA» more  FPGA 1999»
14 years 2 months ago
Trading Quality for Compile Time: Ultra-Fast Placement for FPGAs
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
Yaska Sankar, Jonathan Rose
ISPA
2007
Springer
14 years 4 months ago
Channel Assignment and Spatial Reuse Scheduling to Improve Throughput and Enhance Fairness in Wireless Mesh Networks
In wireless mesh network, by equipped mesh router with multiple radios tuned into orthogonal channels, throughput improvement problem can be alleviated. Efficient channel assignmen...
Nguyen H. Tran, Choong Seon Hong
ECCV
2008
Springer
14 years 8 months ago
Window Annealing over Square Lattice Markov Random Field
Monte Carlo methods and their subsequent simulated annealing are able to minimize general energy functions. However, the slow convergence of simulated annealing compared with more ...
Ho Yub Jung, Kyoung Mu Lee, Sang Uk Lee