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» Synthesis of Non-Interferent Timed Systems
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ASPDAC
2004
ACM
75views Hardware» more  ASPDAC 2004»
14 years 1 months ago
A thread partitioning algorithm in low power high-level synthesis
This paper proposes a thread partitioning algorithm in low power high-level synthesis. The algorithm is applied to high-level synthesis systems. In the systems, we can describe pa...
Jumpei Uchida, Nozomu Togawa, Masao Yanagisawa, Ta...
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
14 years 18 days ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
KI
2007
Springer
14 years 1 months ago
Inductive Synthesis of Recursive Functional Programs
Abstract. We compare three systems for the task of synthesising functional recursive programs, namely Adate, an approach through evolutionary computation, the classification learn...
Martin Hofmann 0008, Andreas Hirschberger, Emanuel...
SCESM
2006
ACM
238views Algorithms» more  SCESM 2006»
14 years 1 months ago
Nobody's perfect: interactive synthesis from parametrized real-time scenarios
As technical systems keep growing more complex and sophisticated, designing software for the safety-critical coordination between their components becomes increasingly difficult....
Holger Giese, Stefan Henkler, Martin Hirsch, Flori...
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
13 years 12 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo