80 search results - page 9 / 16 » Synthesis of Optimal Interfaces for Hierarchical Scheduling ... |
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
CODES
1998
IEEE
14 years 26 days ago
1998
IEEE
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardwar...
TCAD
1998
13 years 8 months ago
1998
— We introduce a transformation, named rephasing, that manipulates the timing parameters in control-data-flow graphs (CDFG’s) during the high-level synthesis of data-pathinten...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
This paper presents a novel partial assignment technique (PAT) that decides which tasks should be assigned to the same resource without explicitly defining assignment of these tas...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...