766 search results - page 19 / 154 » Synthesis of Synchronous Interfaces |
MEMOCODE
2010
IEEE
13 years 6 months ago
2010
IEEE
We present a modular approach for verification of synchronization behavior in concurrent programs that use reentrant locks. Our approach decouples the verification of the lock impl...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
We present several methods to generate modular code from synchronous hierarchical block diagrams. Modularity means code is generated for a given macro (i.e., composite) block inde...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
This paper proposes a thread partitioning algorithm in low power high-level synthesis. The algorithm is applied to high-level synthesis systems. In the systems, we can describe pa...
ICCAD
1994
IEEE
14 years 22 days ago
1994
IEEE
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
ICCAD
1995
IEEE
14 years 5 days ago
1995
IEEE
A key aspect of the synthesis of embedded systems is the automatic integration of system components. This entails the derivation of both the hardware and software interfaces that ...