With the advent of ubiquitous multi-core architectures, a major challenge is to simplify parallel programming. One way to tame one of the main sources of programming complexity, n...
Luis Ceze, Pablo Montesinos, Christoph von Praun, ...
There is today little doubt on the fact that a high-performance and cost-effective Network-on-Chip can only be designed in 45nm and beyond under a relaxed synchronization assumpti...
Daniele Ludovici, Alessandro Strano, Georgi Nedelt...
While many new interfaces for musical expression have been presented in the past, methods to evaluate these interfaces are rare. This paper presents a method and a study comparing...
As the demand for domain- and formalism-specific visual modelling environments grows, the need to rapidly construct complex User Interfaces (UIs) increases. In this paper, we propo...
With the emergence of the packet-switched networks as a possible system-on-chip (SoC) communication paradigm, the design of network-on-chips (NoC) has provided a challenge to the ...