419 search results - page 3 / 84 » Synthesis of networks on chips for 3D systems on chips |
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...
NANONET
2009
Springer
14 years 11 hour ago
2009
Springer
3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between...
ISPD
2011
ACM
12 years 10 months ago
2011
ACM
Three-dimensional ICs promise to significantly extend the scale of system integration and facilitate new-generation electronics. However, progress in commercial 3D ICs has been s...
NOCS
2010
IEEE
13 years 5 months ago
2010
IEEE
—Three-dimensional network-on-chip (3D NoC), the combination of NoC and die-stacking 3D IC technology, is motivated to achieve lower latency, lower power consumption, and higher ...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...