419 search results - page 50 / 84 » Synthesis of networks on chips for 3D systems on chips |
NOCS
2007
IEEE
14 years 2 months ago
2007
IEEE
As embedded computing evolves towards ever more powerful architectures, the challenge of properly interconnecting large numbers of on-chip computation blocks is becoming prominent...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
FPL
2003
Springer
14 years 1 months ago
2003
Springer
This article describes the architecture and implementation of two systems on a programmable chip, which support high accuracy clock synchronization over Ethernet networks. The netw...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
CVIU
2007
13 years 8 months ago
2007
This paper describes a catadioptric microsensor for multidirectional imaging and 3D egomotion computation. Inspired by the wide viewing angle of insects’ compound eyes, we show ...