The difficulties of designing nanoscale circuits include the need for regular circuit structure and controlling the timing requirements. A cellular array has highly regular struct...
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
We propose an algorithm for efficient threshold network synthesis of arbitrary multi-output Boolean functions. The main purpose of this work is to bridge the wide gap that currentl...
A regular circuit structure called a Whirlpool PLA (WPLA) is proposed. It is suitable for the implementation of finite state machines as well as combinational logic. A WPLA is ...