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» Synthesis of quantum logic circuits
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ASPDAC
2010
ACM
112views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Optimizing blocks in an SoC using symbolic code-statement reachability analysis
Abstract-- Optimizing blocks in a System-on-Chip (SoC) circuit is becoming more and more important nowadays due to the use of third-party Intellectual Properties (IPs) and reused d...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
DAC
2006
ACM
14 years 8 months ago
SAT sweeping with local observability don't-cares
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...
Qi Zhu, Nathan Kitchen, Andreas Kuehlmann, Alberto...
GLVLSI
2011
IEEE
351views VLSI» more  GLVLSI 2011»
12 years 11 months ago
Design of low-power multiple constant multiplications using low-complexity minimum depth operations
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
LCN
2003
IEEE
14 years 20 days ago
An Optoelectronic Multi-Terabit CMOS Switch Core for Local Area Networks
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...
Honglin Wu, Amir Gourgy, Ted H. Szymanski
ICCAD
2005
IEEE
87views Hardware» more  ICCAD 2005»
14 years 4 months ago
Statistical technology mapping for parametric yield
The increasing variability of process parameters leads to substantial parametric yield losses due to timing and leakage power constraints. Leakage power is especially affected by ...
Ashish Kumar Singh, Murari Mani, Michael Orshansky