452 search results - page 23 / 91 » System Level Hardware-Software Design Exploration with XCS |
IPPS
2003
IEEE
14 years 2 months ago
2003
IEEE
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
The switch design for interconnection networks plays an important role in the overall performance of multiprocessors and computer networks. It is therefore crucial to study variou...
ISSS
2002
IEEE
14 years 1 months ago
2002
IEEE
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
DAC
2006
ACM
14 years 10 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
IESS
2007
Springer
14 years 3 months ago
2007
Springer
: Much effort in RTL design has been devoted to developing “push-button” types of tools. However, given the highly complex nature, and lack of control on RTL design, push-butt...