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3DIC
2009
IEEE
146views Hardware» more  3DIC 2009»
14 years 2 months ago
A routerless system level interconnection network for 3D integrated systems
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
Kelli Ireland, Donald M. Chiarulli, Steven P. Levi...
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
14 years 2 months ago
UMTS MPSoC design evaluation using a system level design framework
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design f...
Douglas Densmore, Alena Simalatsar, Abhijit Davare...
ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
14 years 4 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
DATE
2005
IEEE
119views Hardware» more  DATE 2005»
14 years 1 months ago
Functional Validation of System Level Static Scheduling
Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing...
Samar Abdi, Daniel D. Gajski
DATE
2000
IEEE
86views Hardware» more  DATE 2000»
13 years 12 months ago
System Level Design Using C++
This paper discusses the use of C++ for the design of digital systems. The paper distinguishes a number of different approaches towards the use of programming languages for digita...
Diederik Verkest, Joachim Kunkel, Frank Schirrmeis...