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ESOP
2012
Springer
12 years 3 months ago
Generate, Test, and Aggregate - A Calculation-based Framework for Systematic Parallel Programming with MapReduce
Abstract. MapReduce, being inspired by the map and reduce primitives available in many functional languages, is the de facto standard for large scale data-intensive parallel progra...
Kento Emoto, Sebastian Fischer, Zhenjiang Hu
ATS
2010
IEEE
261views Hardware» more  ATS 2010»
13 years 5 months ago
The Test Ability of an Adaptive Pulse Wave for ADC Testing
In the conventional ADC production test method, a high-quality analogue sine wave is applied to the Analogue-toDigital Converter (ADC), which is expensive to generate. Nowadays, an...
Xiaoqin Sheng, Hans G. Kerkhoff
DAC
2003
ACM
14 years 8 months ago
A scalable software-based self-test methodology for programmable processors
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit D...
DAC
2006
ACM
13 years 9 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 1 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...