1016 search results - page 20 / 204 » Test Generation for Designs with On-Chip Clock Generators |
VLSID
2010
IEEE
13 years 5 months ago
2010
IEEE
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
ISPD
2004
ACM
14 years 1 months ago
2004
ACM
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
This paper presents a method of generating tests for transition faults using tests for stuck-at faults such that the peak power is the minimum possible using a given set of tests ...
ET
1998
13 years 7 months ago
1998
This paper explores the design of efficient test sets and test-pattern generators for online BIST. The target applications are high-performance, scalable datapath circuits for whi...
ISSRE
2006
IEEE
14 years 1 months ago
2006
IEEE
In a Model-Driven Development context (MDE), model transformations allow memorizing and reusing design know-how, and thus automate parts of the design and refinement steps of a so...