1016 search results - page 63 / 204 » Test Generation for Designs with On-Chip Clock Generators |
ICCAD
1997
IEEE
13 years 12 months ago
1997
IEEE
Interconnect has become the dominating factor in determining circuit performance and reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends...
ITC
1997
IEEE
13 years 12 months ago
1997
IEEE
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
A method to generate test patterns referred to as defect aware test patterns is proposed. Defect aware test patterns have greater ability to detect un-modeled defects. The propose...
COMPUTER
2008
13 years 7 months ago
2008
ions and techniques such as activity models, storyboards, and programming by demonstration (Y. Li and J. Landay, "Activity-Based Prototyping of Ubicomp Applications for Long-L...
AIIA
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Game generation systems perform automated, intelligent design of games (i.e. videogames, boardgames), reasoning about both the rule system of the game and the visual real...